1. Technical Field of the Invention
The present invention relates generally to a power inverter working to drive a polyphase load, and more particularly to such a power inverter designed to minimize a switching loss.
2. Background Art
FIG. 13 shows an example of an electrical structure of a typical inverter working to drive a polyphase AC motor used in driving an electric vehicle. The inverter main circuit 7 is made up of six IGBTs 1 to 6 which are joined in the form of a three-phase bridged connection. The inverter main circuit 7 has DC buses 7a and 7b connected to a positive terminal and a negative terminal of the drive battery 8, respectively, and output terminals 7u, 7v, and 7w connected to respective phase windings (not shown) of a three-phase AC motor such as a synchronous motor, an induction motor, or a brushless motor. The freewheeling diodes D1 to D6 are connected between a collector and an emitter of the IGBTs 1 to 6 electrically in a reverse parallel.
The command generator 10 includes a ROM storing therein data on voltage commands U*, V*, and W* and is designed, for example, to measure a zero-cross point of an output of a current sensor (not shown) disposed between each of the output terminals 7u to 7w of the inverter main circuit 7 and one of windings of the polyphase AC motor 9, measure a phase xcex8 of a rotor of the AC motor 9 using an output of a rotary encoder or a resolver, read the voltage commands U*, V*, and W* for three phases (will also be referred to as U, V, and W-phases below) out of the ROM based on the phase xcex8 to output them to the PWM-waveform generator 11. Note that each of the voltage commands U*, V*, and W* is a function of amplitude of a sine wave, for example.
FIG. 14 shows an internal structure of the PWM-waveform generator 11. The voltage commands U*, V*, and W* are inputted from the command generator 10 to non-inverting inputs of comparators 12a, 12c, and 12e and to inverting inputs of comparators 12b, 12d, and 12f. The carrier wave generator 13 produces a carrier wave in the form of a triangular wave for pulse width modulation (PWM) and outputs it to the inverting inputs of the comparators 12a, 12c, and 12e and the non-inverting inputs of the comparators 12b, 12d, and 12f, respectively.
In a case where the voltage commands U*, V*, and W* and the carrier wave are provided in a digital form, each of the comparators 12a to 12f is implemented by a magnitude comparator. Alternatively, in a case where they are all provided in an analog form, each of the comparators 12a to 12f is implemented by an analog comparator.
When the voltage commands U*, V*, and W* are higher in level than the carrier wave, the comparators 12a, 12c, and 12e output signals C1, C3, and CS of a high level to the dead time generator 14. Simultaneously, the comparators 12b, 12d, and 12f output signals C2, C4, and C6 that are reversed in level to signals C1, C3, and C5 to the dead time generator 14, respectively. The dead time generator 14 works to correct on-off timing of the signals C1, C2, C3, C4, C5, and C6 so as to produce a dead time during which ones of the IGBTs 1 to 6 that are on a negative and a positive side on one arm are both in an off-state in order to prevent the both are in an on-state simultaneously.
The dead time generator 14 produces gate signals G1xe2x80x2 to G6xe2x80x2 which are inputted to gates of the IGBTs 1 to 6 as gate signals G1 to G6, respectively, through the driver 15 made by, for example, a photocoupler.
Considering, as an example, the U-phase, when the voltage command U* is higher in level than the carrier wave, the IGBT 1 is turned on, while the IGBT 2 is turned off, so that a potential at a positive side of a DC power supply (i.e., the battery 8) is outputted from the inverter main circuit 7. Conversely, when the voltage command U* is lower in level than the carrier wave, the IGBT 1 is turned off, while the IGBT 2 is turned on, so that a potential at a negative side of the DC power supply is outputted from the inverter main circuit 7. With these operations, the voltage on the positive side of the battery 8 is outputted during a time period that is proportional to the voltage command U* in a cycle of the carrier wave.
If each of the voltage commands U*, V*, and W* is, as shown in FIGS. 15(a) and 15(b), in the form of a sine wave, the voltage is outputted from the inverter main circuit 7 in the form of a sine wave into which the width of pulses is modulated, thereby outputting the current in the form of substantially a sine wave. As the frequency of the carrier wave is increased, it becomes possible to have the output current approach an ideal sine wave. Increasing the frequency of the carrier wave to 15 kHz or more results in a great decrease in magnetic noise of the motor 9. To this end, the inverter main circuit 7 uses the IGBTs 1 to 6 which are capable of being switched on and off at high speed.
The inverter main circuit 7, however, has a drawback in that operating the inverter main circuit 7 on a great power causes a great amount of heat to be generated due to a loss of power conversion, thus requiring cooling it using water, for example, which forms the obstruction to miniaturization and reduction in manufacturing cost of the system. Half of the loss of power conversion is attributed to an on-off switching loss of the IGBTs 1 to 6. The switching loss usually increases with an increase in switching frequency, thus encountering a difficulty in using the IGBTs 1 to 6 at high switching frequencies.
In order to avoid such a problem, Japanese Patent Application No. 11-369662 (U.S. Pat. No. 6,324,085 B2 assigned to the same assignee as that of this application) teaches a system designed to disenable switching operations of transistors of the inverter main circuit temporarily for a given period of time so as to minimize distortion of waveform of an output current for decreasing the switching loss.
Specifically, during a period of time X, as shown in FIG. 16(b), in which any two of the voltage commands U*, V*, and W* are, as shown in FIGS. 16(a) to 17(f), nearly equal to each other, the above system works to fix the two of the voltage commands U*, V*, and W* at a maximum or a minimum value to stop the switching operation. The period of time X contains a first cycle (b, d, f) in which he two of the voltage commands U*, V*, and W* are fixed at the maximum or minimum value and a second cycle (a, c, e, g) in which only one of the voltage commands U*, V*, and W* is fixed at the maximum or minimum value which are provided alternately, thereby resulting in a further decrease in distortion of the waveform of the output current as well as reducing the switching loss.
The above system, however, determines the switching disenabling period of time regardless of the level of the output current, so that the switching, as shown in FIGS. 18(a) and 18(b), may be performed during a period of time in which the amount of current flowing to a load is relatively great, thus resulting in a difficulty in reducing the switching loss sufficiently.
It is therefore a principal object of the invention to avoid the disadvantages of the prior art.
It is another object of the invention to provide a power inverter for a polyphase load designed to minimize an on-off switching loss of switching elements installed in the inverter.
According to one aspect of the invention, there is provided a power inverter designed to output power to a polyphase load. The power inverter comprises: (a) an inverter main circuit working to apply phase voltages to the polyphase load through switching elements; (b) a voltage command outputting circuit outputting first voltage commands for respective phases, each of the first voltage commands varying between a maximum and a minimum level; (c) a voltage command converter converting the first voltage commands outputted by the voltage command outputting circuit into second voltage commands in a first and a second conversion cycle which are provided alternately; and (d) a switching control signal outputting circuit working to pulse-width modulate a carrier wave as functions of the respective second voltage commands to output switching control signals for the respective phases to control switching operations of the switching elements of the inverter main circuit.
The voltage command converter works to convert two of the first voltage commands into the second voltage commands that are equal to one of the maximum and minimum levels in the first conversion cycle and also convert one of the two of the first voltage commands into the second voltage command that is equal to one of the maximum and minimum levels in the second conversion cycle. If the one of the first voltage commands as being converted into the second voltage command that is equal to the one of the maximum and minimum levels both in the first and second conversion cycles is defined as an A-phase voltage command, the A-phase voltage command is selected as one of two of the first voltage commands showing the maximum and minimum levels within the first and second conversion cycles which is greater in absolute value of a corresponding current outputted to the polyphase load. If the other of the two of the first voltage commands as being converted into the second voltage commands that is equal to the one of the maximum and minimum level only in the first conversion cycle is defined as a B-phase voltage command, the B-phase voltage command is selected as one of the first voltage commands which is greater in absolute value of a corresponding current outputted to the polyphase load next to the A-phase voltage command.
Specifically, the A-phase voltage command has either of the maximum and minimum levels over the first and second conversion cycles, thus disenabling corresponding one or ones of the switching elements completely over the first and second conversion cycles. The B-phase voltage command has either of the maximum and minimum levels only in the first conversion cycle, thereby resulting in a decrease in number of switching operations of the switching elements as compared with the A-phase voltage command. The A-phase is, as described above, selected as one of two of the first voltage commands showing the maximum and minimum levels within the first and second conversion cycles which is greater in absolute value of a corresponding current outputted to the polyphase load. The B-phase voltage command is, as described above, selected as one of the first voltage commands which is greater in absolute value of a corresponding current outputted to the polyphase load next to the A-phase voltage command. If the other first voltage command allowing the switching elements to be switched on and off over the first and second conversion cycles is defined as a C-phase voltage command, the C-phase voltage command is provided for a period of time during which an absolute value of a corresponding current outputted from the inverter main circuit is the lowest. In other words, the switching operations for each phase are performed as many times as possible for a period of time during which an absolute value of a corresponding current output from the inverter main circuit is the lowest, thus resulting in a decrease in switching loss of the switching elements.
In the preferred mode of the invention, the voltage command converter determines one of the first voltage commands selected as each of the A-phase voltage command and the B-phase voltage command as a function of a phase difference between the first voltage command and the current outputted to the polyphase load.
When one of the second voltage commands into which the B-phase voltage command is converted in the second conversion cycle lies out of a range of the maximum level to the minimum level, one of the second voltage commands into which the B-phase voltage command is converted in the first conversion cycle being corrected to a value reversed in polarity, while the second voltage command into which the B-phase voltage command is converted in the second conversion cycle is corrected to a value that is equal to an excess of the second voltage command over the range of the maximum to minimum level. This minimizes the distortion of waveform of the current output from the inverter main circuit.
The number of phases of the polyphase load may be three.
The polyphase load may be an AC motor.
According to the second aspect of the invention, there is provided a power inverter outputting power to a polyphase load which comprises: (a) an inverter main circuit working to apply phase voltages to the polyphase load through switching elements; (b) a voltage command outputting circuit outputting first voltage commands for respective phases, each of the first voltage commands varying between a maximum and a minimum level; (c) a voltage command converter converting the first voltage commands outputted by the voltage command outputting circuit into second voltage commands in a first and a second conversion cycle which are provided alternately; and (d) a switching control signal outputting circuit working to pulse-width modulate a carrier wave as functions of the respective second voltage commands to output switching control signals for the respective phases to control switching operations of the switching elements of the inverter main circuit.
The voltage command converter converts two of the first voltage commands into the second voltage commands that are identical with one of the maximum and minimum levels in the first conversion cycle and also converts one of the two of the first voltage commands into the second voltage command that is identical with one of the maximum and minimum levels in the second conversion cycle. Assuming that one of the two of the first voltage commands which is converted into the second voltage command that is equal to the one of the maximum and minimum levels only in the first conversion cycle is defined as a third voltage command, when the second voltage command into which the third voltage command is converted in the second conversion cycle lies out of a range of the maximum level to the minimum level, the second voltage command into which the third voltage command being converted in the first conversion cycle is corrected to a value reversed in polarity, while the second voltage command into which the third voltage command is converted in the second conversion cycle is corrected to a value that is equal to an excess of the second voltage command over the range of the maximum to minimum level. This minimizes the distortion of waveform of the current output from the inverter main circuit.
In the preferred mode of the invention, if the other of the two of the first voltage commands as being converted into the second voltage commands that is equal to the one of the maximum and minimum level both in the first conversion cycle and the second conversion cycle is defined as a fourth voltage command, the voltage command converter changes one of the first voltage commands selected as each of the third voltage command and the fourth voltage command as a function of a given parameter.
The number of phases of the polyphase load may be three.
The polyphase load may be an AC motor.
According to the third aspect of the invention, there is provided a method of outputting power to a polyphase load from an inverter main circuit which comprises the steps of: (a) outputting first voltage commands for respective phases each of which varies between a maximum and a minimum level; (b) converting the first voltage commands outputted by the voltage command outputting circuit into second voltage commands in a first and a second conversion cycle which are provided alternately, in the first conversion cycle, two of the first voltage commands being converted into the second voltage commands that are equal to one of the maximum and minimum levels, in the second conversion cycle, one of the two of the first voltage commands being converted into the second voltage command that is equal to one of the maximum and minimum levels, if the one of the first voltage commands as being converted into the second voltage command that is equal to the one of the maximum and minimum levels both in the first and second conversion cycles is defined as an A-phase voltage command, the A-phase voltage command being selected as one of two of the first voltage commands showing the maximum and minimum levels within the first and second conversion cycles which is greater in absolute value of a corresponding current outputted to the polyphase load, if the other of the two of the first voltage commands as being converted into the second voltage commands that is equal to the one of the maximum and minimum level only in the first conversion cycle is defined as a B-phase voltage command, the B-phase voltage command being selected as one of the first voltage commands which is greater in absolute value of a corresponding current outputted to the polyphase load next to the A-phase voltage command; and (c) pulse-width modulating a carrier wave as functions of the respective second voltage commands to output switching control signals for the respective phases to control switching operations of switching elements of the inverter main circuit for driving the polyphse load.
In the preferred mode of the invention, one of the first voltage commands selected as each of the A-phase voltage command and the B-phase voltage command being determined as a function of a phase difference between the first voltage command and the current outputted to the polyphase load.
When one of the second voltage commands into which the B-phase voltage command is converted in the second conversion cycle lies out of a range of the maximum level to the minimum level, one of the second voltage commands into which the B-phase voltage command is converted in the first conversion cycle is corrected to a value reversed in polarity, while the second voltage command into which the B-phase voltage command is converted in the second conversion cycle is corrected to a value that is equal to an excess of the second voltage command over the range of the maximum to minimum level.
The number of phases of the polyphase load may be three.
The polyphase load may be an AC motor.
According to the fourth aspect of the invention, there is provided a method of outputting power to a polyphase load from an inverter main circuit which comprises the steps of: (a) outputting first voltage commands for respective phases each of which varies between a maximum and a minimum level; (b) converting the first voltage commands outputted by the voltage command outputting circuit into second voltage commands in a first and a second conversion cycle which are provided alternately, in the first conversion cycle, two of the first voltage commands being converted into the second voltage commands that are identical with one of the maximum and minimum levels, in the second conversion cycle, one of the two of the first voltage commands being converted into the second voltage command that is identical with one of the maximum and minimum levels, assuming that one of the two of the first voltage commands which is converted into the second voltage command that is equal to the one of the maximum and minimum levels only in the first conversion cycle is defined as a third voltage command, when the second voltage command into which the third voltage command is converted in the second conversion cycle lies out of a range of the maximum level to the minimum level, the second voltage command into which the third voltage command being converted in the first conversion cycle being corrected to a value reversed in polarity, the second voltage command into which the third voltage command being converted in the second conversion cycle being corrected to a value that is equal to an excess of the second voltage command over the range of the maximum to minimum level; and (c) pulse-width modulating a carrier wave as functions of the respective second voltage commands to output switching control signals for the respective phases to control switching operations of switching elements of the inverter main circuit for driving the polyphase load.
In the preferred mode of the invention, if the other of the two of the first voltage commands as being converted into the second voltage commands that is equal to the one of the maximum and minimum level both in the first conversion cycle and the second conversion cycle is defined as a fourth voltage command, one of the first voltage commands selected as each of the third voltage command and the fourth voltage command being changed as a function of a given parameter.
The number of phases of the polyphase load may be three.
The polyphase load may be an AC motor.